1. Field of the Invention
This invention relates to integrated processors and more particularly to the generation of multiple clock frequencies within an integrated processor.
2. Description of the Relevant Art
Microprocessor and computer designers strive to reduce size, cost and power consumption of computer systems while increasing the speed of computer systems. One way to achieve these diverse goals is to increase the integration of circuitry on one monolithic chip. In recent years, integrated processors have been developed to replace previously discrete microprocessors and associated peripheral devices within computer systems. An integrated processor is an integrated circuit that integrates the functions of both a microprocessor and various peripheral devices such as, for example, a memory controller, a DMA controller, a timer and a bus interface unit on a single monolithic chip. The introduction of integrated processors has allowed for decreases in the overall cost, size, and power consumption of computer systems and has in many cases accommodated improved performance characteristics of the computer system.
One disadvantage of integrated processors is the limited number of external pins available for inputting or outputting data to/from the integrated processor. Accordingly, a design goal of integrated processor designers is to reduce the number of external pins required to perform the functions of the integrated processor.
In one particular integrated processor, a microprocessor core is integrated with a peripheral bus interface circuit. The peripheral bus interface circuit interconnects with a peripheral bus external to the integrated processor that may operate at two or more frequencies. The integrated processor receives two clock input signals from an external clock generation circuit: a reference clock signal and an external clock signal. The reference clock signal is a constant frequency signal used to generate an internal clock signal for the internal bus interface circuit. The external clock interface signal provides a clock signal to the peripheral bus and may operate at a plurality of frequencies. The frequency of the internal clock signal is proportional to the frequency of the external clock signal and typically is a multiple of the external clock signal frequency. Accordingly, the internal clock frequency is adjusted when the external clock frequency is adjusted. In conventional integrated processors, an input signal to the integrated processor indicates the frequency at which the internal clock signal must operate to be compatible with the external clock signal. Unfortunately, the control signal to indicate the appropriate frequency of the internal clock signal requires the use of an external pin. As discussed above, it is a design goal of the integrated processor designer to minimize the number of signals received on external pins.